eprintid: 10191029
rev_number: 13
eprint_status: archive
userid: 699
dir: disk0/10/19/10/29
datestamp: 2024-05-16 14:54:03
lastmod: 2024-05-16 14:54:03
status_changed: 2024-05-16 14:54:03
type: thesis
metadata_visibility: show
sword_depositor: 699
creators_name: Dang, Manyu
title: Optimisation of III-V Buffer on Si Substrates
ispublished: unpub
divisions: UCL
divisions: B04
divisions: C05
divisions: F46
note: Copyright © The Author 2024. Original content in this thesis is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International (CC BY-NC 4.0) Licence (https://creativecommons.org/licenses/by-nc/4.0/). Any third-party copyright material present remains the property of its respective owner(s) and is licensed under its existing terms. Access may initially be restricted at the author’s request.
abstract: Monolithically integrating direct-bandgap III-V compound semiconductors onto silicon (Si) is a promising method for high-volume applications. However, when III-V materials are epitaxially grown on Si substrates, the inherent material distinctions introduce a high occurrence of crystalline defects including threading dislocations (TDs), antiphase boundaries (APBs), and micro-cracks. These defects act as non-radiative recombination centres, causing a significant decline in the performance and reliability of final devices. Furthermore, thermal cracks will significantly degrade the yield during the massive production. This thesis focuses on mitigating the impact of these critical defects in molecular beam epitaxy (MBE) grown III-V materials on Si substrates, while different buffer designs for alleviating these growth defects have been demonstrated. The ultimate goal is to develop practical on-chip light sources and low-cost III-Sb optoelectronic devices for Si-based PICs.
To address the issue of micro-cracks without compromising the performance of the laser, a 300 nm Ge buffer layer was first investigated as a replacement for a portion of the thicker GaAs layer in Chapter 3. The optimisation of the Ge buffer layers involves experimenting with various temperatures for the low-temperature Ge layer, using Sb as a dopant with various doping density and different annealing temperature range to achieve a low TD density at 2.6 × 108 cm-2. This approach could save an 1100 nm thickness budget for the final laser devices, which has the chance to avoid the formation of thermal cracks. To further enhance the performance of InAs/GaAs QDs grown on Si substrates, a defect filter layer (DFL) was utilised to reduce the TD density. The thesis delves into the optimisation of DFLs, within Chapter 4 exploring and comparing the effect of the in-situ annealing at the different growth stages, different DFL structures, and different DFL materials. A novel InAlGaAs asymmetric-step graded DFL design with the optimised growth technique is demonstrated to reduce the surface TD density to 6.3 × 106 cm−2 within 2 µm thickness. 
In Chapter 5, an innovative approach has been devised to eliminate the propagation of APBs while growing the polar III-Sb materials on non-polar Si by solely MBE growth. The proposed AlGaSb/GaSb superlattice buffer structure with neglectable strain mismatch leads to the main phase dominant surface. Furthermore, Chapter 5 discusses the investigation of the unique dislocation-mitigated surface morphology of III-Sb materials grown on Si, APB nucleation, propagation and potential interaction with micro-twin, providing valuable insights for further growth optimisation for III-Sb on on-axis Si (001) platforms.
Significantly, these endeavours have enhanced the characteristics of buffer structure, streamlining the growth prerequisites for high-quality QD lasers or photodetectors integrated monolithically on silicon. These achievements mark a significant advancement in the realm of Si-based photonic integrated circuits.
date: 2024-04-28
date_type: published
oa_status: green
full_text_type: other
thesis_class: doctoral_open
thesis_award: Ph.D
language: eng
primo: open
primo_central: open_green
verified: verified_manual
elements_id: 2269427
lyricists_name: Dang, Manyu
lyricists_id: MDANG64
actors_name: Dang, Manyu
actors_id: MDANG64
actors_role: owner
full_text_status: public
pages: 204
institution: UCL (University College London)
department: Electronic and Electrical Engineering
thesis_type: Doctoral
citation:        Dang, Manyu;      (2024)    Optimisation of III-V Buffer on Si Substrates.                   Doctoral thesis  (Ph.D), UCL (University College London).     Green open access   
 
document_url: https://discovery-pp.ucl.ac.uk/id/eprint/10191029/2/Final_Thesis_Manyu%20Dang_UCL.pdf