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A software-defined architecture and prototype for disaggregated memory rack scale systems

Syrivelis, D; Reale, A; Katrinis, K; Syrigos, I; Bielski, M; Theodoropoulos, D; Pnevmatikatos, DN; (2018) A software-defined architecture and prototype for disaggregated memory rack scale systems. In: 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS). (pp. pp. 300-307). IEEE: Pythagorion, Greece. Green open access

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Abstract

Disaggregation and rack-scale systems have the potential of drastically increasing TCO and utilization of cloud datacenters, while maintaining performance. In this paper, we present a novel rack-scale system architecture featuring software-defined remote memory disaggregation. Our hardware design and operating system extensions enable unmodified applications to dynamically attach to memory segments residing on physically remote memory pools and use such remote segments in a byte-addressable manner, as if they were local to the application. Our system features also a control plane that automates software-defined dynamic matching of compute to memory resources, as driven by datacenter workload needs. We prototyped our system on the commercially available Zynq Ultrascale+ MPSoC platform. To our knowledge, this is the first time a software-defined disaggregated system has been prototyped on commercial hardware and evaluated through industry standard software benchmarks. Our initial results - using benchmarks that are artificially highly adversarial in terms of memory bandwidth - show that disaggregated memory access exhibits a round-trip latency of only 134 clock cycles; and a throughput penalty of as low as 55%, relative to locally-attached memory. We also discuss estimations as to how our findings may translate to applications with pragmatically milder memory aggressiveness levels, as well as innovation avenues across the stack opened up by our work.

Type: Proceedings paper
Title: A software-defined architecture and prototype for disaggregated memory rack scale systems
Event: 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)
Location: Pythagorion, Greece
Dates: 17-20 July 2017
ISBN-13: 9781538634370
Open access status: An open access version is available from UCL Discovery
DOI: 10.1109/SAMOS.2017.8344644
Publisher version: https://doi.org/10.1109/SAMOS.2017.8344644
Language: English
Additional information: This version is the author accepted manuscript. For information on re-use, please refer to the publisher’s terms and conditions.
Keywords: disaggregation, extended memory, serverless computing, pooled computing, rack scale systems, rack scale datacenters, software-defined systems, cloud datacenters, internetscale computer
UCL classification: UCL
UCL > Provost and Vice Provost Offices > UCL BEAMS
UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science
UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science > Dept of Electronic and Electrical Eng
URI: https://discovery-pp.ucl.ac.uk/id/eprint/10069632
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