Zeng, Haotian; (2023) The Growth and Fabrication of Nanostructures Monolithically Grown on Si Substrates. Doctoral thesis (Ph.D), UCL (University College London).

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Abstract

To meet the rapidly growing requirements for ultra-fast data transfer and processing, the higher density and hence the reduced size of the electronic and optoelectronic components for the integrated circuit are mandatory. As representative members of the big family of nanoscale structures, one-dimensional semiconductor nanowires and two-dimensional nanosheets have been extensively investigated because of their potential to further scale down the modern complementary metal-oxide-semiconductor. One of the most concerning issues of integrating III-V semiconductors on Si is the strain-related defects initiated by the lattice mismatch between these heterostructures. Semiconductor III-V nanowires can readily grow on various substrates owing to the effective lateral strain relaxation through side facets. As a result, direct bandgap III-V nanowires can be integrated with the modern Si platform. In addition to the nanowires, 2D nanosheets can adjust their band structure by changing their thickness. With a large ratio of surface to volume, nanosheets are also recognized as prospective building blocks for nanoscale optoelectronics. In this thesis, the relationship between surface energy and preference for nanowire growth direction is investigated first. Solid source III-V MBE was used for the growth of GaAs nanowires on differently oriented Si(001), (111), and (311) substrates by the self-catalysed vapour-liquid-solid growth method. A model for predicting nanowire growth direction is built based on scanning electron microscopy, transmission electron microscopy inspections, and detailed surface energy calculations to explain the trending of <111> growth direction for nanowires. GaAs nanowires were grown on Si (001), (111), and (311) to support our theory. For surface energy calculations, factors like the Ga catalyst formation and the areal dangling bond density for different facets are taken into account. In addition, a surface energy mapping in three dimensions of the droplet/nanowire interface is given based on comprehensive calculations. The three-dimensional surface energy mapping helps predict particular <111> nanowire growth direction on other oriented silicon wafers. Moreover, high-quality GaAs/Ge core-shell nanowires were designed and grown on Si (111) substrate, with a smooth passivation shell surface, a sharp and dislocation-free interface, and an almost defect-free nanowire body confirmed by systematic transmission electron spectroscopy characterization. The PL measurements show that GaAs/Ge nanowires are optical-active, and the Ge shell acts as a surface passivation coating. It is promising that GaAs/Ge nanowires, as an optical-active and electronic-suitable radial heterostructure in the nanoscale, would further promote the level of integration of circuits on Si by incorporating both nanophotonics and nanoelectronics functionalities on Si chip. Finally, InAs nanosheets are exploited for three types of memory applications, i.e. electronic, optoelectronic and all-optical memory cells. Surface carrier trapping behaviour is observed from the pristine InAs nanosheet, indicating the existence of the ‘memory effect’. The concept of carrier trapping and de-trapping on surface states and the resultant ‘memory effect’ can be employed to explain the key features and mechanisms for all three types of memory. Specifically, the electronic memory cell utilizes its gate hysteresis for the process of electrical writing; the optoelectronic memory cell employs the negative photoresponse as optical writing; the all-optical memory is demonstrated with a dual-state PL phenomenon for optical writing and reading light information. To be highlighted, an ultra-low power consuming room-temperature optoelectronic memory unit by 2D InAs nanosheet is fabricated based on the memory effect with good reproductivity. The potential of the multifunctional memory cell is investigated based on the pristine InAs nanosheets, which could be used as building blocks for highly integrated circuits.

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